The SD2.0 Host Controller IP supports the Secured Digital (SD)2.0 memory technologies and it handles all of the timing and interface protocol requirements to access the media as well as processing the commands. A host CPU or Microprocessor can easily utilize this IP to access a SD memory card.

Features

• Compliance with the following specification versions:
  

- Part 1 Physical Layer Specification Version 2.00

- Part A2 SD Host Controller Standard Specification version 2.00

• Auto Card detect
  

• Forced initialization on the inside of the controller IP

• Supports SPI, SD 1-bit and SD 4-bit mode

• Supports the normal mode of 25MHz and the optional highspeed mode of 50MHz

• Supports an 8KB Read/Write buffer for CPU/Microprocessor initiated writes and reads
  

• Supports both single and multiple block read/write operation

• CRC7 and CRC16 support for CMD and DATA

• With EMIF (External Memory Interface) and AHB interface for user application